Under-voltage monitoring device having time delay means for regulated power supplies

ABSTRACT

A regulated power supply for use with voltage sensitive devices such as integrated circuits is monitored for low voltage conditions. When the monitored voltage drops below or remains below a predetermined level for longer than a predetermined period of time an inhibit signal is provided.

United States Patent lll ii Gately [4 1 June 13, 1972 UNDER-VOLTAGEMONITORING 3,315,246 4/1967 Huffman et a]. ..324/133 UX Lundm S FGULATED P WER SUPPLIES 3,166,678 l/l965 Fleshman et al. ....340/248 A UX0R RE 0 3,457,560 7/1969 McKinley ..34o/24s c 72 Inventor: Joseph R(htely, woodside N Y 3,383,522 5/1968 Apfelbeck et al.... ..307/2353,482,231 12/1969 I Florek et a! ...340/248 A X [73] Assignee: ForbroDesign Corp., New York, NY. 3,482,234 12/1969 Doniger et al. ..340/248 A[22] Filcd: Much 1970 Primary Examiner- Gerard R. Strecker 2 A No: 19 5Atmmey-Alfred W. Barber 57 ABSTRACT [52] US. Cl 324/ 133, 324/295,310/2381]; A regulated power S pp y for use with voltage Sensitive 51int. Cl ..G0 r I I devicessuch asimegrated circuitsis monitored forlowvoltage 58 Field of Search ..324/133, 29.5; 340/248, 249; 7 conditions.when the monitored voltage drops below or 7/ 141 3 remains below apredetermined level for longer than a predetermined period of time aninhibit signal is provided. [56] References Cited UNITED STATES PATENTS7 Chins, 3 Drawing figures 3,532,968 10/1970 overlie ..340/249 XPITENIEDIIIII m2 3,670,246

SHEET 1 IF 2 ,2. ,s REGULATED 4 UNDER VOLTAGE POWER MONITOR SUPPLYUTILIZATION MEANS 1 FIG. I

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INVENTOR.

JOSEPH R. GATELY ATTORNEY load voltage,

UNDER-VOLTAGE MONITORING DEVICE HAVING TIME DELAY MEANS FOR REGULATEDPOWER SUPPLIES It is characteristic of certain logic circuits thatoperation must be suppressed when and if the supply voltage falls belowor has not yet reached some critical value. To insure that a safevoltage has been attained and is being maintained, it is desirable toprovide means for inhibiting or signalling an unsafe supply voltagecondition for a short period after safe operating voltage has beenattained.

Accordingly, it is one object of the present invention to provide aninhibit signal at all times when the supply voltage is below apredetermined (safe) voltage.

It is a further object to provide the inhibit signal for a short butpredetermined length of time after the supply voltage has attained asafe operating value.

SUMMARY A Schmitt trigger compares the load voltage across circuits tobe protected from low voltage conditions changes its condition at apredetermined undervoltage point, say 4.7 volts for a circuit normallyoperated at volts. A time delay circuit is provided including a capacitynormally charged and in charged condition providing no output warning(clear) signal to the circuit protective means, when the load voltagedrops below the predetermined undervoltage point, the Schmitt triggerswitches. Coupledto the trigger circuit is a transistor which isconnected across the capacitor. When this transistor is turned on by thetrigger action, it discharges the capacitor which in turn turns on atransistor in the output circuit providing a warning (clear) signal. Ifthe load voltage again returns to normal, a current regulated circuitcharges the capacitor again at a predetermined rate so that it reaches aterminal voltage sufficient to turn off the warning (clear) circuitafter a predetermined time interval. The charging current is madeadjustable so that the time required to turn off the warning circuit isadjustable around, say, 3 seconds. The monitoring circuit is designed tocome to a stable operating condition in a very short time so that if itis turned on at the same instant that the power supply being monitoredis turned on it will hold the warning signal circuit on until apredetermined time after the load voltage has reached its normaloperatingpoint.

In the drawing FIGJ l is a block diagram of a system incorporating theinvention.

FIG. 2 is a graphical representation of the operation of the invention.1

FIG. 3 is a detailed schematic circuit diagram of the preferred form ofthe present invention.

FIG. 1 shows a regulated power supply 1 supplying power to a load 4 overleads 2 and 3. The undervoltage monitor 5 is connected across the load 4by means of leads 6 and 7. A warning or clear signal is provided overlead 8 whenever the load voltage is below a predetermined level. Thissignal is used by suitable utilization means 9 as by feeding back acut-off signal to power supply 1 over lead 10. The internal circuitry ofthe preferred form of undervoltage monitor 5 is shown in detail in FIG.3 and is described below.

' FIG. 2 illustrates the operation of undervoltage monitor 5 duringtum-on of the regulated power supply 1 and in the presence ofa decreasein load voltage below a predetennined level which is less than thenormal load operating voltage. Curve A simulates the rise of the loadvoltage from the instant of turn on of the power supply at time zerountil it reaches normal operating voltage. At low voltage and until theload voltage reaches thepreset level B, the undervoltage-monitor 5remains set providing an output clear signal over lead 8. When level Bis exceeded starting at time C, the undervoltage monitor 5 starts toreset and when the load voltage has remained above the level B for apreset time, C to D, the output clear signal is turned off and no signalis provided over line 8. lfthe time B, the undervoltage monitor quickly,as at time F, takes hold and supplies a warning clear signal over line8. The waming signal will not be removed again until the load voltageagain exceeds level B and remains above level B for the predeterminedpreset interval of time.

FIG. 3 is the circuit of the preferred form of the invention. Theundervoltage monitor is powered from a suitable source of voltageillustrated by battery 11 and regulated to provide two regulatedvoltages, one on line 13 and the other on line 17. The first regulatedvoltage is provided across zener diode 1'4 receiving current fromvoltage source 11 through dropping resistor 12. The second regulatedvoltage is provided across zener diode l5 supplied with current throughdropping resistor 16 from the first regulated voltage across zener diode14. Thus, the second regulated voltage is highly stable as a result ofthe two stages of regulation. This second and highly regulated voltageis applied to a Schmitt trigger circuit comprising transistors 18 and 19and the associated circuitry.'This circuitry includes emitter resistor20 connected between line 17 and the emitter of transistor 18; resistor21' connected between the emitters of transistors 18 and 19; resistors27 and 28 joined at junction 32 and connected from the collector oftransistor 18 to common line 7; resistor 22, potentiometer 23 andresistor 26 all connected in series between line 17 and the collector oftransistor 18. The base of transistor 19 is connected to the adjustablecontact 24 of potentiometer 23. The base of transistor 18. is connectedthrough resistor 29 to line 6 which is to be connected to the positiveside of the load to be monitored (common line 7 is to be connected tothe other side of the load). Capacitor 25 is connected to the base oftransistor 19 and the collector of transistor 18 to accelerate theswitching operation of the trigger.

It will be seen that with a low voltage from the load applied to thebase of transistor 18, this transistor will be on and transistor 19 willbe off. As the load voltage rises, a point will be reached at which thevoltage on the base of transistor 18 will be sufficiently positive toturn transistor 18 offcausing the circuit to trigger with transistor 19turning on. The triggering point is determinedby the circuit constantsand the setting of the adjustable contact 24 (base of transistor 19). Inthe example given above, the trigger voltage is 4.7 volts. The Schmitttrigger is designed to have very little hysteresis so that for practicalpurposes we can say it switches at 4.7 volts when the voltage on thebase of transistor 18 reaches 4.7 volts from either direction. Thus,transistor 18 is on (conducts) whenever the load voltage is below thepredetermined and preset value as stated, 4.7 volts.

, As long as transistor 18 is conducting, current flows from itscollector through resistors 27 and 28 and the base of transistor 30connected to junction point 32 receives a positive bias causing it to beon or conducting. Since the collector to emitter path of transistor 30is connected over leads 33 and 31 respectively across capacitor 34,capacitor 34 is shorted and supports no voltage as long as transistor 18is conducting due to low voltage across the load. With no voltage acrosscapacitor 34 the base of transistor 41, connected to one side thereof,is held down to a low voltage and transistor 41 is held off. Withtransistor 41 off, no current flows from its emitter through zener diode44 or resistor 45 and the base of transistor 46 connected to thejunction between zener diode 44 and resistor 45 receives no bias. Withno bias on its base, transistor 46 is off or non-conducting. Thecollector of transistor 46 is connected to line 13 through resistor 47and zener diode 43 in series and the emitter of transistor 46 isconnected to common lead 7 by lead 50. With transistor 46 off, the baseof transistor 49, connected to the collector of transistor 46 by lead48, receives a positive bias from line 13 through zener diode 43 andresistor 47- and transistor 49 is turned on and is conducting. Withtransistor 49 conducting a circuit closure is provided between line 8connected to its collector and common line 7 connected to its emitter bylead 51. This circuit closure provides the warning or clear signalindicating that the load voltage is below the predetermined voltagechosen as the monitored value (4.7

for any reason, drops below preset level B as at volts).

When the load voltage rises above the preset monitored value (4.7volts), the Schmitt trigger switches conduction from transistor 18 totransistor 19, the emitter of which is returned to common line 7 by lead52, and the bias is removed from the base of transistor 30 (sincetransistor 18 becomes non-conducting and practically no current flowsfrom is emitter through resistors 27 and 28). With transistor 30nonconducting, the collector to emitter shunt path is opened acrosscapacitor 34. A controlled current charging circuit is provided tocharge capacitor 34 when this shunt path is open. Transistor 35 isconnected as a constant current source. The voltage across zener diode43 (for example 3.3 volts) is applied to the base of transistor 35 andfixed resistor 36 in series with adjustable resistor 37 are connected inseries with the emitter of transistor 35. The current from the collectorof transistor 35 over lead 39 to charge capacitor 34 will besubstantially equal to the zener voltage (3.3 volts) of zener diode 43divided by the sum of resistors 36 and 37 (neglecting the base toemitter drop of transistor 35 The magnitude of this current can beadjusted by changing the setting of variable contact 38 of adjustableresistor 37. When the voltage across capacitor 34 reaches the zenervoltage of zener diode 44 plus the base to emitter conduction voltagesof transistors 41 and 46, transistors 41 and 46 will be turned on. Whentransistor 46 goes on, the resulting saturation voltage (collector toemitter voltage) of transistor 46 will turn transistor 49 off and thewarning or clear signal conduction condition on line 8 will be removedindicating that the load voltage being monitored has exceeded the presetvoltage (4.7 volts) and has remained in excess fora predetermined periodof time (the time required to charge capacitor 34). The time for whichthe monitored voltage must exceed the preset voltage may be adjusted byselecting the charging rate of capacitor 34, by changing the setting ofadjustable contact 38 of resistor 37.

If the monitored voltage drops below the preset voltage, the systemresets to its initial condition, i.e., transistor 18 turns on, turningon transistor 30 which heavily shunts capacitor 34, quickly dropping itsvoltage and in turn, turning transistors 41 and 46 off and transistor 49on, restoring the warning or clear shunt condition between line 8 andcommon line 7. Thus, the system quickly signals an undervoltagecondition at the load but does not signal normal operation until thenormal operation has persisted for a predetermined period of time.transistor 35 over lead 39 to charge capacitor 34 will be substantiallyequal to the zener voltage (3.3 volts) of zener diode 43 divided by thesum of resistors 36 and 37 (neglecting the base to emitter drop oftransistor 35). The magnitude of this current can be adjusted bychanging the setting of variable contact 38 of adjustable resistor 37.When the voltage across capacitor 34 reaches the zener voltage of zenerdiode 44 plus the base to emitter conduction voltages of transistors 41and 46, transistors 41 and 46 will be turned on. When transistor 46 goeson, the resulting saturation voltage (collector to emitter voltage) oftransistor 46 will turn transistor 49 off and the warning or clearsignal conduction condition on line 8 will be removed indicating thatthe load voltage being monitored has exceeded the preset voltage (4.7volts) and has remained in excess for a predetermined period of time(the time required to charge capacitor 34). The time for which themonitored voltage must exceed the preset voltage may be adjusted byadjusting the charging rate of capacitor 34, by changing the adjustmentof resistor 38.

If the monitored voltage drops below the preset voltage, the systemresets to its initial condition, i.e. transistor 18 turns on, turning ontransistor 30 which heavily shunts capacitor 34, quickly dropping itsvoltage and in turn, turning transistors 41 and 46 off and transistor 49on, restoring the warning or clear shunt condition between line 8 andcommon line 7. Thus, the system quickly signals an undervoltagecondition at the load but does not signal normal operation until thenormal operation has persisted for a predetermined period of time.

1 claim:

1. in a voltage monitoring system, the combination of;

a source of adjustable reference voltage; means for comparing a voltageto be monitored with said reference voltage;

switching means responsive to monitored voltage less than said referencevoltage coupled to said comparing means; adjustable time delay means;

means coupling said adjustable time delay means to said switching means;

means included in said coupling means responsive to said switching meansfor disabling said time delay means in response to monitored voltageless than said reference voltage;

and output signaling means coupled to said time delay means andresponsive thereto to indicate an undervoltage condition of themonitored voltage.

2. A voltage monitoring system as set forth in claim 1;

wherein said switching means comprises a Schmitt trigger circuit.

3. A voltage monitoring system as set forth in claim I;

wherein said time delay means includes an adjustable constant currentsource and a capacitor connected to be charged by said constant current.

4. A voltage monitoring system as set forth in claim 1;

wherein said output signaling means includes a transistor indicatingundervoltage condition of the monitored voltage by a turned-on state.

5. A voltage monitoring system as set forth in claim 1;

wherein said switching means comprises a Schmitt trigger and includingmeans for applying the voltage to be monitored to the input thereof.

6. In a voltage monitoring system, the combination of; trigger means forcomparing a voltage to be monitored with a reference voltage; adjustabletime delay means;

means coupling said adjustable time delay means to said trigger means;

indicating means coupled to said time delay means;

said trigger means, time delay means and indicating means being adaptedto respond to increasing monitored voltage rising above a predeterminedlevel to actuate said indicating means after a predetermined time delay;

and wherein said time delay coupling means includes inhibiting means fordisabling said time delay means adapted to respond to decreasingmonitored voltage falling below said predetermined level to actuate saidindicating means in substantially less than said delay time.

7. In a voltage monitoring system, the combination of;

A Schmitt trigger including two bipolar transistors, adjustable meansfor setting the triggering point and means for applying the voltage tobe monitored to the input thereof;

a capacitor coupled to an output, normally on, bipolar transistor, saidcoupling adapted to turn said bipolar transistor off in response to apredetermined charge voltage across said capacitor;

a transistor connected across said capacitor and coupled to said Schmitttrigger for discharging said capacitor in response to monitored voltageof less than a predetermined voltage;

a transistor connected to supply an adjustable constant current tocharge said capacitor;

whereby said output transistor is turned off after a predetermined timedelay from the instant the monitored voltage rises above saidpredetermined voltage and is turned off without delay from the instantthe monitored voltage falls below said predetermined voltage.

1. In a voltage monitoring system, the combination of; a source ofadjustable reference voltage; means for comparing a voltage to bemonitored with said reference voltage; switching means responsive tomonitored voltage less than said reference voltage coupled to saidcomparing means; adjustable time delay means; means coupling saidadjustable time delay means to said switching means; means included insaid coupling means responsive to said switching means for disablingsaid time delay means in response to monitored voltage less than saidreference voltage; and output signaling means coupled to said time delaymeans and responsive thereto to indicate an undervoltage condition ofthe monitored voltage.
 2. A voltage monitoring system as set forth inclaim 1; wherein said switching means comprises a Schmitt triggercircuit.
 3. A voltage monitoring system as set forth in claim 1; whereinsaid time delay means includes an adjustable constant current source anda capacitor connected to be charged by said constant current.
 4. Avoltage monitoring system as set forth in claim 1; wherein said outputsignaling means includes a transistor indicating undervoltage conditionof the monitored voltage by a turned-on state.
 5. A voltage monitoringsystem as set forth in claim 1; wherein said switching means comprises aSchmitt trigger and including means for applying the voltage to bemonitored to the input thereof.
 6. In a voltage monitoring system, thecombination of; trigger means for comparing a voltage to be monitoredwith a reference voltage; adjustable time delay means; means couplingsaid adjustable time delay means to said trigger means; indicating meanscoupled to said time delay means; said trigger means, time delay meansand indicating means being adapted to respond to increasing monitoredvoltage rising above a predetermined level to actuate said indicatingmeans after a predetermined time delay; and wherein said time delaycoupling means includes inhibiting means for disabling said time delaymeans adapted to respond to decreasing monitored voltage falling Belowsaid predetermined level to actuate said indicating means insubstantially less than said delay time.
 7. In a voltage monitoringsystem, the combination of; A Schmitt trigger including two bipolartransistors, adjustable means for setting the triggering point and meansfor applying the voltage to be monitored to the input thereof; acapacitor coupled to an output, normally on, bipolar transistor, saidcoupling adapted to turn said bipolar transistor off in response to apredetermined charge voltage across said capacitor; a transistorconnected across said capacitor and coupled to said Schmitt trigger fordischarging said capacitor in response to monitored voltage of less thana predetermined voltage; a transistor connected to supply an adjustableconstant current to charge said capacitor; whereby said outputtransistor is turned off after a predetermined time delay from theinstant the monitored voltage rises above said predetermined voltage andis turned off without delay from the instant the monitored voltage fallsbelow said predetermined voltage.